1. Field
Example embodiments relate to an exposing method for semiconductor device manufacturing, and more particularly, to an exposing method using a variable shaped beam capable of correcting the critical dimension (CD) linearity of the variable shaped beam, and a pattern forming method using the same.
2. Description of Related Art
As semiconductor device become more integrated, the linewidth of a pattern becomes finer. It becomes difficult to accurately form a pattern with a fine linewidth on a wafer using a photolithography process. A variety of exposure technologies have been proposed to form such a pattern with a fine linewidth on a wafer using the photolithography process. Electron beam lithography using an electron beam may be used, as one such exposure method. The electron beam lithography technology has excellent resolution and accuracy, as compared to other exposure technologies.
Examples of the electron beam lithography include a Gaussian beam method, a cell projection method, and a variable shaped beam (VSB) method, depending on a beam shape. In lithography technology of the VSB method, the openings of apertures may be arranged to partially overlap each other, an electron beam may pass through the overlapping portions of the openings, and a shaped electron beam may be illuminated onto a photoresist layer on a substrate to form photoresist patterns on the substrate. Since the lithography technology of the VSB method may divide a design circuit pattern into a plurality of rectangular shots having various sizes that may be used to perform an exposure, it is important to generate electron beams having the same sizes as those of the divided circuit patterns.
Measurement of the CD of a generated beam shot may indicate that a CD difference may be created between the CD of the design beam shot and the CD of the generated beam shot, depending on the control accuracy of electron beam exposure equipment and the process conditions. Therefore, it may be difficult to accurately form desired photoresist patterns on the substrate. To accurately form the desired photoresist patterns, a CD difference between the CD of the design beam shot and the CD of the generated beam shot may be corrected. Particularly when the design CD of a circuit pattern to be formed may be below a value, a difference between the CD of the design beam shot and the CD of the generated beam shot may increase even more, due to a limit of resist resolution.
FIG. 1 is a graph illustrating linearity of a circuit pattern with respect to a CD change when circuit patterns having various CDs are exposed using an electron beam exposure equipment, according to the conventional art. Here, the CDs of the circuit patterns are interpreted to mean design CDs. Referring to FIG. 1, as the design CD of the circuit pattern varies, a mean to target (MTT) may change. When the design CD is greater than a value, for example when the design CD is in a range that is greater than 300 nm (as shown by Section A), a linear relationship exists between MTT and design CD. On the other hand, when the design CD is in a range that is less than 300 nm (as shown by Section B), a non-linear relationship exists between MTT and design CD. Additionally, as the design CD of the circuit pattern grows smaller, the linearity between MTT and design CD deteriorates further.
Circuit patterns may mean photoresist patterns formed on a substrate such as a quartz substrate, or photoresist patterns formed on a semiconductor wafer. The design CD may mean the target CD of the photoresist patterns to be formed on the substrate, or the target CD of the photoresist patterns to be formed on the wafer. The generated CD may mean a CD measured on the photoresist patterns that are actually formed on the substrate, or the wafer after an exposure process. The linearity may mean a degree by which a difference between the design CD and the measured CD of the circuit patterns changes according to the design CD. The linearity may be considered excellent when a CD difference between the design CD and the generated CD is constant as the design CD changes. Therefore, to accurately form the designed circuit patterns on the substrate, the CD linearity may be corrected by controlling the shot size of an electron beam in an electron beam exposing method.
FIG. 2 is a graph showing a method of controlling the shot size of an electron beam to correct CD linearity. Referring to FIG. 2, in an ideal case, the shot output (the CD of a generated beam shot) of an electron beam exposed on a substrate or a wafer coincides with the shot input (the CD of a design beam shot) of an electron beam generated by electron beam exposure equipment, as shown by line 21. In this case, a CD difference between the CD of the design beam shot and the CD of the generated beam shot does not exist even when the CD of the circuit patterns change. Accordingly, the CD of the beam shot does not need to be corrected.
In example embodiments where shot output increases at a constant rate, as shot input increases the shot gain of an electron beam may be controlled to correct the CD of the beam shot, as shown by line 23. When shot output changes at a constant rate, as shot input increases the shot offset of an electron beam may be controlled to correct the CD of the beam shot, as shown by line 25. The CD linearity of the beam shot in a range where the MTT linearly changes (section A of FIG. 1) may be corrected using the shot offset correcting method, or the shot gain correcting method. However, when the CD linearity of the beam shot is corrected using the shot gain correcting method or the shot offset correcting method, in a range where the MTT non-linearly changes (section B of FIG. 1), an error is generated as illustrated in FIG. 3. This is because the shot gain correcting method and the shot offset correcting method are linear correcting methods.
Therefore, when the design CD of the circuit patterns is greater than a value, the CD of the beam shot may be linearly controlled using the shot gain correcting method or the shot offset correcting method to correct CD linearity. On the other hand, when the design CD of the circuit patterns is less than the value, the CD of the beam shot may be non-linearly corrected. In example embodiments, when the design CD of the circuit patterns is less than the value, the CDs of the beam shot with respect to the design CD of the circuit patterns may be generated as a table, and the table for the CDs may be directly applied in correcting the CD linearity. Alternatively, the CD of the beam shot may be non-linearly controlled using a rule obtained from the table to correct CD linearity. A method of correcting the CD linearity according to example embodiments, will be described herein, in detail.